A 12-bit ADC is used with 0-5 V input. What is the least-significant-bit (LSB) value, and what is the maximum quantization error as a percentage of full scale?

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Multiple Choice

A 12-bit ADC is used with 0-5 V input. What is the least-significant-bit (LSB) value, and what is the maximum quantization error as a percentage of full scale?

Explanation:
With a 12-bit ADC over 0–5 V, the number of discrete levels is 2^12 = 4096. The least-significant bit (LSB) value is the full-scale range divided by the number of steps: LSB = 5 V / 4096 ≈ 0.00122 V = 1.22 mV. The maximum quantization error occurs halfway between codes, which is ±0.5 LSB. In volts, that’s 0.5 × 1.22 mV ≈ 0.61 mV. As a percentage of full scale (5 V), this is 0.61 mV / 5000 mV ≈ 1.22 × 10^-4 = 0.012%. So the LSB is about 1.22 mV, and the worst-case quantization error is about ±0.61 mV, or roughly 0.012% of full scale.

With a 12-bit ADC over 0–5 V, the number of discrete levels is 2^12 = 4096. The least-significant bit (LSB) value is the full-scale range divided by the number of steps: LSB = 5 V / 4096 ≈ 0.00122 V = 1.22 mV.

The maximum quantization error occurs halfway between codes, which is ±0.5 LSB. In volts, that’s 0.5 × 1.22 mV ≈ 0.61 mV. As a percentage of full scale (5 V), this is 0.61 mV / 5000 mV ≈ 1.22 × 10^-4 = 0.012%.

So the LSB is about 1.22 mV, and the worst-case quantization error is about ±0.61 mV, or roughly 0.012% of full scale.

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